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High-sensitivity low-noise CCD arrays and high-speed low-power CMOS peripheral circuits are implemented on single silicon device
Max. 256 stages for time-delayed-integration
Programmable sub-stages
3K ~ 29K pixel resolution
3.5um ~ 7um pixel pitch
Support for bi-directional scanning
Max 300kHz line rate @ full resolution
On-chip 12b ADC
Under mass production
12M ~ 340M pixel resolution
Max 15 fps @ 155M resolution
On-chip 12b ADC
90M, 155M, 238M sensors are under mass production